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ITMiVT / LEBEDEV ELBRUS IN C2 5E92b  |  Elbrus-2 MVK  |  A-35 / Don-2N  |  how the hall did the job Project Orlan Data Base // public encyclopedia
ITMiVT Lebedev Elbrus C2

Elbrus Russian Chipset Line

DON-2N (Pill Box) radar

WHAT IT IS

ITMiVT (Institute of Precision Mechanics and Computer Engineering / IPMCE, 1948) is Lebedev’s Moscow shop. Chip and ISA detail sits on the existing Elbrus page. This page is the C2 use: what the boxes were built to do in a missile-defence and warning loop, how the hardware was arranged to do it, and where that differs from Kartsev’s M-10 at Solnechnogorsk.

Two jobs lived in one design brief. Real-time control — eat a radar firehose, keep a track file, fly an interceptor, do not crash if a cabinet dies. Heavy arithmetic — discriminate warhead from balloon in the same second. Western machines usually picked one. Elbrus-1/2 was specified for both because the customer was ABM, space control, and weapons work. Burtsev said so; CHM’s Elbrus-2 write-up says so; the Don-2N floor is the surviving example.

THE C2 JOB, LAYER BY LAYER

A Moscow ABM cycle is not “a computer calculates a missile.” It is a closed loop:

1. Early-warning (SPRN Voronezh / Dnepr / space echelon at Serpukhov-15) says something is coming. That grade is Kartsev-era iron at Solnechnogorsk — 17L6 / 5E66 — not Elbrus. 2. Engagement radar (Dunai-3 on A-35, Don-2N on A-135) searches, tracks, sorts real objects from decoys. 3. The computing complex owns the common combat program: associate plots into tracks, predict, assign a firing channel, compute interceptor fly-out, send coded steering to the missile, fuse telemetry coming back, decide whether to command the warhead. 4. Human duty shift watches the grade. On A-35 the combat cycle itself was written to run without a man in the inner loop.

ITMiVT machines sat in steps 2–3. 5E92b was the A-35 brain. Elbrus-2 is the A-135 / Don-2N brain. Same institute, one generation later, same doctrine: the computer is the fire-control loop.

5E92b — FIRST GENERATION C2 HARDWARE

Lebedev chief designer, Burtsev the working deputy. First fully semiconductor Soviet computer with a serious self-test and a dual-processor layout. Published numbers from the Aldan / heritage papers: big processor ~500 thousand ops/s, small processor ~37 thousand ops/s, 48-bit fixed point, 32K-word RAM, 2 µs main cycle. Software-compatible with M-40 / M-50 so System “A” code could move forward. Programs for 5E92b were written in Novosibirsk (KBSP / later ITMiVT branch) under Nechepurenko and Marchuk.

How A-35 wired them. The regional real-time net (“РВСРВ A-35”) was 55 semiconductor machines: 29 dual-processor 5E92b, 20 Yuditsky K340A, 6 Shafrov T-40U. Heart: a multi-machine Main Computing Complex of those 29 5E92b sets, including five physically sitting in Tobol firing complexes. Twenty-four of the 5E92b lived in the Main Command-Computing Centre at Kubinka-10 with the Main Command Post and the Dunai-3M electronics. Dunai-3 long-range radar combat algorithm ran on six 5E92b. Each two-channel firing complex had its own machine: Tobol = one 5E92b doing both combat work and functional check; Yenisei = two T-40U (one combat, one check). Combat crew on a Dunai-3: five officer-programmers covering detect/track, trajectory, functional control, ECM defence, and the feed toward SPRN and higher CPs.

What the 5E92b was actually computing in that cycle: plot extraction and association, ballistic prediction, channel assignment, interceptor steering commands, radar health, jamming picture. A-35’s published design threat was a handful of Titan-2 / Minuteman-2 class single-warhead ICBMs; the computer net was sized for that, not for a modern MIRV raid — which is why A-135 and Don-2N needed a different hall.

ELBRUS-2 MVK — THE HARDWARE

Elbrus-1 state tests 1980 (~15 Mops class, TTL). Elbrus-2 drawn 1978 while Elbrus-1 was still a prototype; prototypes ~1984; state commission on the ten-processor set 1985; series really moving ~1987; built into 1992. About 200 processors in the CHM count, not 200 full ten-CPU halls. Element base: ECL (IS-100 / Motorola 10K-class), semiconductor RAM, water cooling. Clock about five times Elbrus-1; effective scientific mix closer to ten times because of extra arithmetic instructions. CHM: on a clock-adjusted mix, in the Cray X-MP conversation.

Modular layout of one MVK “Elbrus-2”:

— 1 to 10 central processors (CPU). — 1 to 32 memory modules, grouped as sections. A section (ЭПП) is four memory modules plus a memory switch (КмОП). Minimum block 16K words, matching a 16-kbit RAM chip. — 1 to 4 I/O processors (ПВВ). Each I/O processor has 40 channels: 8 fast (drums, disks) and 32 standard. I/O processors have their own memory so the radar stream does not stall the CPUs. — Shared main memory. Processors and I/O processors run against that memory in parallel. Crossbar is multiport / multibus, full-graph (“each to each”). Control word on a memory line: 24 bits of address + opcode plus ~10 service signals. Peak exchange with one processor ~180 MB/s. Peak I/O bandwidth of the complex ~120 MB/s.

Published maxima for a full MVK: ~120–125 million ops/s, memory 16 million 72-bit words = 144 MB. A CPU contains a control unit, an arithmetic unit, and a scratchpad (СОЗУ). Burtsev’s point about that scratchpad: it is per-CPU and does not have to be flushed when another processor writes main memory — they did not want a conventional coherent cache in a real-time combat program. Second-level instruction handling is pipelined with as much overlap as they could get. Hardware dynamically maps virtual fast registers onto execution units so the compiler is not doing all the scheduling.

Tags. Every word carries a type tag (Burroughs / Iliffe idea). Pointers, integers, floats, descriptors are different objects to the hardware. A million-instruction combat suite cannot be allowed to treat a track-file pointer as an angle. El-76, the system language (ALGOL-68 family), is built around those tags; that is why the language does not port cleanly. Hardware also carries OS primitives — process and memory protection are not “a kernel if you remembered to write one.”

Failure model — this is the C2 part. Identical modules, nearly 100% hardware check, automatic isolation of a dead module, repair of that module while the working set keeps computing, no requirement to halt the complex for preventive work. State-test language: good enough for real-time systems whose allowed downtime Tvdop is greater than 10 minutes, and for compute centres with short checkpoints. ABM doctrine is “lose a CPU, keep the raid.” That is why they spent iron on reconfiguration instead of on a single faster uniprocessor — the argument Lebedev lost to Burtsev in 1973.

Physical: popular accounts squeeze a later Elbrus-2 into three cabinets; Don-2N’s four-complex hall is still quoted at ~1,200 m² of tall racks plus water. ECL wants current and wants that water.

HOW DON-2N USED FOUR OF THEM

Published fit: four Elbrus-2 MVKs (often described as four ten-processor systems). Aggregate talk ~1 GIPS. Combat software >1.2 million instructions besides the OS; software 40–50% of hardware cost. That number is the point. The machine is not a calculator sitting next to a radar. It is search management, track-while-scan, raid analysis, decoy discrimination, interceptor fly-out geometry, and the coded links to 53T6 / 51T6 in the same second. Four faces of Don-2N dump plots; four complexes share one engagement picture in common memory so a track born on the west face is already an object the south-face intercept math can use.

Why tags and El-76 on a radar: a 1.2-million-instruction suite written by many offices over years will smash itself if a descriptor and a scalar share a word. Why I/O processors: the centimetre-wave face is a firehose; you do not want that DMA in the same pipeline as the intercept differential equations. Why ten CPUs with auto-drop: a raid does not wait for a cabinet swap. May 2024 visit copy: Elbrus-2 still in the hall in reserve; live “intellectual core” moved to three small racks of newer domestic machines, four computers per rack, each rack claimed faster than the old floor. Type of those racks unpublished. The job did not change. The crate did.

WHAT THE INSTRUCTIONS WERE DOING

Strip the brochure words and the inner loop is classical fire control:

— ingest plot messages from the array beam scheduler; — gate and associate against the existing track file (the file lives in shared 72-bit tagged words); — filter / predict (Kalman-class work in modern language; period Soviet combat codes had their own filters); — classify: warhead, tank, balloon, fragment, aircraft — Don-2N’s reason for existing; — assign a firing channel and an interceptor; — integrate the interceptor trajectory against the predicted intercept point, emit steering words on the coded link; — ingest interceptor telemetry, close the loop; — keep a functional-control image of every radar cabinet so a sick face is dropped before it poisons the file; — format the picture upward to the A-135 CP and sideways to SPRN.

A-35 did the same list on 500-kops 5E92b boxes with a smaller threat and narrower radars. Elbrus-2 is that list with MIRV-era arithmetic and four faces. Kartsev’s 17L6 at Solnechnogorsk does a different list: fuse many distant warning radars and satellites, emit a national warning, not fly a 53T6.

PLACE IN THE STACK

Above Voronezh / Serpukhov-15 (warning). Beside Kazbek (release authority). Below the supreme commander. Peer of Kartsev, not a replacement that was ever documented at the 514th CP. MCST later sells Elbrus micros into S-400 loops and lists SPRN/SKKP/PRO on slides — that is the institute’s afterlife, covered on Elbrus.

CAVEATS

120 vs 125 Mops. 144 MB is the 16-million-word maximum, not every installation. “Four ten-processor systems” at Don-2N is the usual English compression of four MVKs. New Sofrino racks unnamed. El-76 source for A-135 is not public. 5E92b counts (29 / 24 / 6) are from the SoRuCom / programmer-memoir cluster — best open numbers, still a reconstruction.

STATUS

5E92b is museum and memoir. Elbrus-2 still occupies floor at Sofrino as reserve. Live ABM math has moved to smaller domestic racks. The C2 job — common track file, interceptor loop, survive a dead module — is unchanged.

IN ONE SENTENCE

ITMiVT’s C2 line is 5E92b running A-35’s automated combat cycle on 29 dual-processor boxes, then Elbrus-2 — a 10-CPU, 144 MB, tagged, water-cooled shared-memory MVK with separate I/O processors — doing Don-2N’s search, discrimination and interceptor fly-out so a dead cabinet does not drop the raid.


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