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KARTSEV M-10 / 5E66 / 17L6 SPRN command-post computers  |  NIIVK  |  M-10M  |  M-13 Project Orlan Data Base // public encyclopedia
Kartsev M-10 / 5E66 / 17L6

WHAT IT IS

M-10 is Mikhail Aleksandrovich Kartsev’s third-generation multiprocessor, the machine the Soviet missile-attack warning system (СПРН) and the space-surveillance catalogue (СККП) actually ran on in the 1970s–80s. Ministry of Defense cipher: 5E66. At the SPRN command post the same iron was bundled as complex 17L6 — six M-10-class machines. A first-stage CP upgrade also names computing complex 5K31 next to the Krokus warning kit. Daryal faces used sibling suites 63I6 and 68I6 on the same architecture. Anatoly Savin’s SKKP complex was another M-10 customer.

Designer: Kartsev, Institute of Computing Complexes (НИИВК / NIIVK), spun out of Bruk’s Institute of Electronic Control Machines. Government order on M-10: 1969, out of the unbuilt M-9 vector paper machine. Documentation to the Zagorsk plant mid-1970. First industrial set: 1973. Serial about fifteen years. Production stop commonly dated 1986; about 50 sets in the Topwar / industrial-history count. “Several dozen” in museum language. Until about 1980 it held the highest published Soviet figures for speed, internal memory, and multiplex-channel throughput — ahead of BESM-6 and ES-1060 on the jobs it was built for.

WHY SPRN NEEDED IT

A boost-phase or midcourse track lives in seconds. Each Dnestr / Dnepr / Daryal / later Voronezh node dumps a firehose of plots. The CP has to correlate nodes hundreds of kilometres apart, run the combat-program criteria for a warning signal, drive Krokus, and keep doing it when a cabinet dies. Kartsev’s answer was a synchronous multiprocessor you could gang, not a single Lebedev BESM in a nicer box. The 1969 board that blessed both M-10 and Elbrus is the political fact: Lebedev wanted a fast uniprocessor; Glushkov backed both; both got built. M-10 went to warning and space watch. Elbrus went to other strategic work and, decades later, is what MCST still sells into SPRN modernization slides.

M-10 / 5E66 — PUBLISHED SPECS

State-commission protocol numbers (computer-museum.ru / NIIVK histories):

Average throughput: 5.1 million ops/s. Retrospective boasts of 20–30 million on favorable mixes exist; treat 5.1 as the signed figure and the higher number as a peak-mix claim. Internal memory total: 5 MB in two levels. — Level-1 RAM (ferrite, 2D, cores M100P-2K1058): 0.5 MB, cycle 1.3 µs, access 0.8 µs. — ROM (capacitor store, firmware on replaceable 265×68 metal “punched cards,” 0.5 mm plate with polyethylene pads, 128 cards per block, eight 34-bit words per card): 0.5 MB, cycle 1.3 µs, read 0.5 µs. — Level-2 “big memory” (random-access ferrite on 1.0×0.7×0.3 mm thermostable microcores, 3D/4W): 4 MB (65,536 numbers × 544 bits), cycle ~6–7 µs, access ~2.5 µs, 9 µs with post-write destroy pulse. Multiplex channel: >6 MB/s with 24 duplex directions live; 64 KB channel buffer. Interrupts: 72 channels, five priority levels. Eight simultaneous users on eight “mathematical consoles.”

One machine cycle issued fixed-point, floating-point, and integer ops together. Vector widths cited: 16 pairs of 16-bit, 8 of 32-bit, 4 of 64-bit, 2 of 128-bit. Two arithmetic-processor lines. Word work at 64 bits where BESM-6 was on 48 — the plasma-model comparison Kartsev’s people used: ~20× BESM-6 on a 512-node / 104-macroparticle kinetic grid that still fit BESM memory, worse for BESM as the grid grew.

Physical: M-10 about 31 cabinets, 21 of them memory. Floor: 325 m². Draw: 112 kVA. MTBF quoted 700–1,000 hours. Architecture firsts claimed in NIIVK copy: synchronous clustering of up to seven machines with direct inter-program exchange that bypassed the multiplex channel; dynamic hardware sharing; automatic rebuild of the processor field; external I/O into both memory levels.

M-10M

Tightened M-10. Floor 200 m², draw 66 kVA. First machine NIIVK kept for itself; they built a multi-user simulation stand on it and used that stand to lay out multilayer boards for M-13. Same combat role, less hall.

17L6, 5K31, 63I6 / 68I6 — THE SUITES

17L6 — SPRN command-post complex, six M-10-class machines. That is the public designation for what sat behind the Solnechnogorsk glass when the upgraded first-stage system went live with a new combat program and Krokus. Whether all six were in one hall or split main/reserve is unpublished.

5K31 — named in first-stage SPRN histories as the CP computing complex fielded with Krokus and the five Dnestr-M nodes (Murmansk, Riga, Gulshad, Irkutsk, Sevastopol). Relationship to 17L6: same generation, possibly the earlier or the program-level name. No rack diagram in the open.

63I6 / 68I6 — Daryal site computers, M-10 based. The face that ate 50 MW needed local iron, not just a line to Senezh.

Network boast attached to the 5E66 / 5E71–73 family: the country’s largest multi-machine complex, 76 computers on one algorithm, 24-hour duty, data links tens of thousands of kilometres. That is SPRN + SKKP + the radar nodes as a single computational organism, not one cabinet.

M-13 — THE INTENDED SUCCESSOR

1978: Kartsev proposes a multiprocessor vector machine from M-10/M-10M lessons and large-scale ICs. Name: M-13. Engineering docs 1979; unit docs to plants 1980–81. Fourth generation. Job: real-time firehose processing. Four architectural blocks in the prospectus: central processor, hardware OS support, remote-control interfaces, special processor. “Ensemble” of processors that handed arithmetic and subroutines around among themselves — up to 225 processors on the large model in museum language. Three sizes: M-13/10, /20, /30, differing in memory and peripherals, not in instruction set.

Kartsev died 23 April 1983 (age 60) in the middle of that fight. M-13 was built in limited form; it did not become a documented, named replacement for 17L6 in the way M-10 became 5E66. That is the break in the public chain.

WHAT REPLACED IT

No MoD press release says “17L6 ripped out, part number X inserted.” What is public, in layers:

At the radar. Voronezh industry copy describes a later open-architecture real-time server: two processor-cell types, VME plus a user bus, Eurocard / “Euromechanics” crate, half a standard cabinet, ~1.5 kW, claimed up to 1011 ops/s, 80,000-hour life, no on-site repair. That is the 77Ya6 node, not proof of the 514th hall.

At the strategic CP layer. MCST (ИТМиВТ / Elbrus lineage) lists SPRN, SKKP, PRO, and ASU SN among current and prospective customers for Elbrus-based computing complexes. Elbrus-1 state tests 1980; Elbrus-2 serial from 1985 (~125 million ops/s in popular accounts, 144 MB RAM class). Later Elbrus-90micro SPARC, then Elbrus VLIW micros (2S3, 8S, 16S). A 2020s MCST briefing slide puts SPRN on the same page as S-400 / naval BIUS / special C2. That is a vendor claiming the account, not a photograph of the 514th floor.

2001 Serpukhov-15 fire destroyed a three-storey CP and the programs in it; the rebuild after August 2001 is the likeliest moment a 1970s Kartsev suite at the satellite post was not put back as-was. Solnechnogorsk’s six-machine 17L6 fate is undocumented. TASS-era notes about a “new information-delivery complex” on SPRN duty speak to Krokus’s grandchild, not to the CPU name.

Honest sentence: M-10 / 5E66 / 17L6 is the last SPRN CP computer that has a public parts identity. M-13 was the in-house heir that lost its chief. Elbrus and generic VME/server halls are the two replacement stories that fit doctrine and industry talk. The rack that grades a raid in 2026 is not in a catalogue.

HOW THE SOFTWARE SAT ON IT

Combat programs written with industry at the object (Repin, Menshikov, Golovkin, Makeev, Traubenberg, Grigoryev and the three-shift debug crews): node interaction, CP equipment control, criteria that turn plots into a warning signal, Krokus output. Eight-console timesharing is how a duty commander and a duty engineer and the plot crew share one 5E66 without eight machines. Direct seven-machine clustering is how 17L6 is six boxes that behave as one algorithm — the same idea as the 76-machine national net, scaled to a hall.

PLACE IN THE STACK

Below Krokus, beside Don-2N’s own computers, above every Voronezh VME crate, under the 514th CP doctrine. Same generation as Daryal’s 63I6/68I6. Cousin of Savin’s SKKP complex. Rival path to Elbrus, not a child of it.

CAVEATS

5.1 Mops is the commission number; 20–30 Mops is advocacy. 50 sets vs “several dozen.” 17L6 vs 5K31 relationship unstated. M-13 fielding vs paper. Elbrus-in-SPRN is a manufacturer list, not a serial plate on Senezh. Capacitor-ROM “punched cards” are metal plates, not paper IBM cards.

STATUS

M-10 production dead since the mid-1980s. The architecture’s job — fuse radar and space tracks in seconds and emit a warning — is still the 514th’s job. The name on the crate is the part that went dark.

IN ONE SENTENCE

Kartsev’s M-10 (MoD 5E66) is the 5.1-Mops, 5-MB, 31-cabinet multiprocessor that ran SPRN and SKKP; 17L6 was six of them at the Solnechnogorsk command post, 63I6/68I6 the Daryal copies — succeeded on paper by M-13, in industry talk by Elbrus and VME servers, and in the open archive by silence.


Project Orlan // Underground Information Database